>From d3be3a7bdcc2e2b84b524980f5c31adf31327df1 Mon Sep 17 00:00:00 2001 Message-Id: From: Tim Blechmann Date: Wed, 19 Dec 2012 12:38:05 +0100 Subject: [PATCH] atomic: gcc/x86 - use lock/addl or mfence as memory barrier Signed-off-by: Tim Blechmann --- boost/atomic/detail/gcc-x86.hpp | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/boost/atomic/detail/gcc-x86.hpp b/boost/atomic/detail/gcc-x86.hpp index bc33868..5c30320 100644 --- a/boost/atomic/detail/gcc-x86.hpp +++ b/boost/atomic/detail/gcc-x86.hpp @@ -20,10 +20,14 @@ namespace boost { namespace atomics { namespace detail { -#if defined(__x86_64__) -# define BOOST_ATOMIC_X86_FENCE_INSTR "mfence\n" +#if defined(__x86_64__) && defined(__SSE2__) +# define BOOST_ATOMIC_X86_FENCE_INSTR "mfence\n" +# define BOOST_ATOMIC_X86_LFENCE_INSTR "lfence\n" +# define BOOST_ATOMIC_X86_SFENCE_INSTR "sfence\n" #else # define BOOST_ATOMIC_X86_FENCE_INSTR "lock ; addl $0, (%%esp)\n" +# define BOOST_ATOMIC_X86_LFENCE_INSTR BOOST_ATOMIC_X86_FENCE_INSTR +# define BOOST_ATOMIC_X86_SFENCE_INSTR BOOST_ATOMIC_X86_FENCE_INSTR #endif inline void @@ -36,11 +40,11 @@ platform_fence_before(memory_order order) break; case memory_order_release: case memory_order_acq_rel: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* release */ break; case memory_order_seq_cst: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* seq */ break; } @@ -55,14 +59,14 @@ platform_fence_after(memory_order order) break; case memory_order_acquire: case memory_order_acq_rel: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* acquire */ break; case memory_order_consume: /* consume */ break; case memory_order_seq_cst: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* seq */ break; default:; @@ -77,8 +81,10 @@ platform_fence_after_load(memory_order order) case memory_order_release: break; case memory_order_acquire: + __asm__ __volatile__ (BOOST_ATOMIC_X86_LFENCE_INSTR ::: "memory"); + break; case memory_order_acq_rel: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); break; case memory_order_consume: break; @@ -98,12 +104,14 @@ platform_fence_before_store(memory_order order) case memory_order_consume: break; case memory_order_release: + __asm__ __volatile__ (BOOST_ATOMIC_X86_SFENCE_INSTR ::: "memory"); + break; case memory_order_acq_rel: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* release */ break; case memory_order_seq_cst: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* seq */ break; } @@ -118,14 +126,14 @@ platform_fence_after_store(memory_order order) break; case memory_order_acquire: case memory_order_acq_rel: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* acquire */ break; case memory_order_consume: /* consume */ break; case memory_order_seq_cst: - __asm__ __volatile__ ("" ::: "memory"); + __asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory"); /* seq */ break; default:; -- 1.7.10.4